Nvidia Reportedly Seeks TSMC 3nm Base Dies for Custom AI Memory

Key Takeaways

• Nvidia has reportedly asked Samsung, SK Hynix and Micron to use TSMC’s 3nm process for the base dies of its custom NVHBM memory. The manufacturing arrangement remains unconfirmed officially.
• NVHBM moves Nvidia’s memory controller into the memory stack’s base die, aiming to improve bandwidth, reduce power consumption and simplify integration across suppliers.
• The proposal could expand TSMC’s role in AI memory while creating opportunities and demanding qualification requirements for memory manufacturers.

Nvidia’s Reported Request Puts AI Memory Supply in Focus

Nvidia is reportedly seeking a common manufacturing approach for its next-generation custom high-bandwidth memory, asking Samsung Electronics, SK Hynix and Micron Technology to use TSMC’s 3nm process for NVHBM base dies.

Reports published on October 18 described a strategy intended to make memory supplied by different manufacturers easier to integrate into Nvidia’s technology ecosystem. The proposed arrangement would combine memory production from multiple suppliers with a shared advanced logic manufacturing process.

The distinction between the product and the manufacturing report is important. Nvidia has publicly introduced NVHBM and outlined its architecture. However, the specific requirement for all three memory suppliers to use TSMC’s 3nm process has not been independently confirmed through the company announcements reviewed for this article.

For investors, the development raises questions about how AI memory orders, manufacturing responsibilities and bargaining power could evolve across the semiconductor supply chain.

What NVHBM Changes Inside AI Chips

High-bandwidth memory places stacked memory dies close to an AI processor. The base die sits beneath those memory layers and provides the connection between the stack and the wider computing system.

In conventional architectures, the memory controller occupies space on the main processor. NVHBM integrates Nvidia’s custom memory controller into the HBM base die, freeing processor space that can potentially accommodate additional computing circuitry.

Nvidia has described potential benefits of up to 30% higher memory bandwidth and 15% lower HBM power consumption compared with standard HBM4E. These are company-stated capabilities rather than guarantees for every finished system.

The architecture forms part of Nvidia’s NVLink Fusion offering, which provides technology for customers developing custom AI infrastructure. Its significance therefore extends beyond memory procurement for Nvidia-branded processors.

The broader objective is to make memory integration a more consistent part of system design, reducing the engineering work required when using products from different memory vendors.

Why Standardisation Matters for Nvidia

A common implementation could help Nvidia and its partners manage multiple memory suppliers more efficiently.

Differences between suppliers can require additional integration, testing and validation. Reducing those differences could make it easier to qualify alternative sources and plan future products around a more consistent memory interface.

Commercially, broader sourcing flexibility could strengthen Nvidia’s position when negotiating capacity and delivery schedules. However, a shared specification would not automatically make every supplier interchangeable. Each manufacturer would still need to meet product performance, reliability and production requirements.

The proposal also presents a supply-chain trade-off. Nvidia could gain greater flexibility across memory manufacturers while concentrating an important logic manufacturing step at TSMC.

That means diversification at the memory-supplier level would not necessarily remove dependence on a particular foundry or advanced process.

Samsung, SK Hynix and Micron Face Different Implications

For Samsung, the reported arrangement would carry particular strategic significance because the company operates both memory and foundry businesses.

Using TSMC for an NVHBM base die could help Samsung compete for high-end memory business, while placing part of the manufacturing work outside its own foundry operations. The commercial outcome would depend on order volumes, production costs and the division of responsibilities.

For SK Hynix, cooperation with TSMC on HBM base dies already has an established foundation. The companies announced a partnership in 2024 covering HBM4 development and advanced packaging, including plans to use TSMC’s logic process for the base die.

That existing relationship provides context for the latest report, but does not establish confirmation of a specific NVHBM 3nm production agreement.

For Micron, participation could provide another route into custom AI memory demand. As with its competitors, the opportunity would depend on successful qualification and the ability to deliver commercially viable products at scale.

Across all three companies, standardisation could shift more competition toward manufacturing execution, delivery reliability and cost efficiency.

TSMC Could Gain a Broader Role in AI Memory

The reported proposal highlights how advanced logic manufacturing could become more important within memory products.

TSMC’s potential opportunity would come from producing the logic base die beneath the memory stack. If several memory suppliers adopted the same foundry process, TSMC could participate in production across multiple supply relationships.

This could broaden its exposure to AI infrastructure beyond the fabrication of processors themselves.

However, the report does not establish wafer volumes, contract values, customer allocations or the timing of any material revenue contribution. Those details are necessary before translating a possible manufacturing role into earnings estimates.

Greater use of advanced logic would also leave production dependent on available foundry capacity and successful coordination between chip designers, memory manufacturers and packaging providers.

What Investors Should Watch Next

The next meaningful developments are official confirmation of supplier participation, disclosure of the manufacturing process and evidence that products have passed customer qualification.

Production milestones will matter as much as design announcements. Sampling, qualification and volume manufacturing represent different stages, and progress at one stage does not establish readiness for the next.

Investors should also watch whether companies disclose committed capacity, expected shipment schedules or changes to capital spending associated with custom memory.

No verified share-price reaction is established here. The report emerged on Sunday, October 18, outside regular US equity trading hours, so it should not be described as the cause of an earlier stock-market move.

Nvidia’s reported proposal points toward tighter coordination between AI processor design, memory architecture and advanced foundry manufacturing. Its commercial significance will depend on whether that coordination produces qualified products, dependable supply and measurable financial returns.